Manage the Place and Route group and tapeout for all company products. Able to be a mentor for Junior Engineers. Determine project schedule and chip die size. Able to handle full chip Place and Route. Able to run Apollo P&R tool, including CTS, HPO, Saturn, Jupiter, and physical verification tools. Very good understanding in logic synthesis and timing tools.

Experience with Avanti Apollo, timing driven flow, Saturn, HPO, CTS, and floorplanner is a must. Experiences in Avanti Hercules
verification and Cadence Opus Layout tool is a plus. Experience in synthesis and static timing tools is a plus.

BSEE with 7 yrs experience. MSEE with 8 yrs experience preferred.

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Manager of Product Engineering

Responsibilities: Product responsibility for new product architecture in the set top box market. Responsibilities will include new product introduction, product characterization and debug. Driving new product to full production releases, including offshore transfers. Other responsibilities will include yield analysis and improvements. The opportunity to interface with foundries and subcontractors. Working with customers to ensure product satisfaction.

Requirements: ATE experience, yield improvement, product debug and characterization. Candidate must possess good problem solving skills and project leadership. DFT, ATE programming, Fab process understanding, mixed signal product experience. Must have 7+ years semiconductor experience, including 1+ years of management experience.

Education: BSEE required, MSEE highly desireable

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